Computer Architecture Colloquium

COTSon: Infrastructure for Full-System Simulation

Paolo Faraboschi, HP Labs

Friday, October 3 • noon - 1pm • Klaus 1116W

Abstract

 

The pervasive rise of multicore is deeply and quickly changing the field of computer architecture. Understanding the impact of  new architectural ideas involves much more than analyzing single-threaded applications running in isolation on a CPU core for a few milliseconds. The need to model the full software stack, longer-running workloads and full-system devices are creating new simulation challenges that are only going to get worse in the foreseeable future. Unfortunately, no tool exists today that can simulate systems of thousands of nodes with hundreds of cores per node, at sufficient speed and accuracy to run the full software stack. 

This talk argues that three deep changes in simulation philosophy are needed to address these challenges. (1) Statistical Approach: abandon the idea of a 'always-on' cycle-based simulation in favor of statistical sampling approaches that can trade accuracy and speed when needed. (2)  Solid Foundations: base functional simulation on established and validated tools that can efficiently run commodity OSs and complex multi-tier applications.  (3) Leverage: quickly leverage other existing simulator "modules" for individual sub-components (such as disks or networks) without always reinventing the wheel.

COTSon is joint development between HP Labs and AMD and is the first of a new breed of simulators attempting to fill this gap. It attacks the challenge of obtaining accurate decision-support data for architecting and developing high-value systems in the multi-core era. We see COTSon as a "virtual test bench" for software, system, solution architects and programmers. It enables testing ideas early, reduces cost and time-to-market by enabling better data sooner, and reduces risk by increasing the confidence of making the right choices. COTSon is not "yet another simulator". It is an infrastructure that enables us to couple a fast and robust x86 functional platform emulator (AMD's SimNow) with modern sampling techniques, customizable timing and power model for CPU and other devices, and a framework to extend simulation to clusters. COTSon allows to simulate complete systems ranging from individual multicore nodes up to full clusters of multicore nodes with complete network simulation. It is a pluggable architecture where researchers can customize most modules to their own research needs.

The core of the talks describes COTSon's design principles that trade off accuracy for speed across the board: for sampling, CPU models and network synchronization. It presents the tool capabilities and underlying technologies and some of the published research results. The talk will conclude with a demo of the tool and a discussion of open opportunities for research uses in academia. For further information, we recommend attending the tutorial at MICRO-41 planned in November.

 

About the Speaker

 

Paolo Faraboschi is a Distinguished Technologist in the "Exascale Computing Lab" of  HP Labs, which he joined in 1994. His research interests skirt the boundary of hardware and software, including analysis of highly-parallel systems, VLIW architectures, compilers and embedded systems. From 1997 to 2002, he was the technical leader of the "Custom-Fit Processor" Project at HP Labs Cambridge (MA) and the principal architect of the Lx/ST200 family of VLIW microprocessors, an embedded core widely used in a variety of high-volume consumer electronics. After that, Paolo was involved in designing the computing aspects of large content processing applications (the "Time Archive" project) and on virtualization technologies for thin-client based remote desktops. Since 2003 he leads HP Labs' Barcelona Research Office work on simulation and analysis techniques for the multi-core era. He received a PhD in EECS from the University of Genoa (Italy) in 1993. Paolo is an active member of the computer architecture community, and served in many top-tier conferences, including as a Program and General Chair for MICRO and CASES (he is Program co-Chair for MICRO 2008 in Lake Como, Italy) He co-authored over 50 papers, 12 patents, and (with Josh Fisher and Cliff Young) the book "Embedded Computing: a VLIW approach to architecture compiler and tools".